TI DACx3204 Registers

Register endianness on your I2C bus: please pick one.

TI DACx3204 ICs are configured using a bank of 16-bit registers accessed via SPI, I²C, or PMBus. The first sign that something is fishy is advertising support for I²C and PMBus, since the latter is a subset of the former.

When using PMBus (it has to be enabled first by using an I²C-mode register), the registers are little-endian:

When using (non-PMBus) I²C, the registers are big-endian:

All I²C mode registers are also mapped in PMBus mode, and PMBus has a few additional ones for bus housekeeping. The register numbers do overlap between modes (keep in mind that I²C mode is not paged, and PMBus mode is paged), and entering PMBus mode disables I²C-mode accesses. This is not specified in the datasheet, and I had to figure this out by testing on real hardware.

The way the switchover works means that if your CPU has come out of reset you may not know which mode the DAC is in, but this is at least solvable: after executing S addr|W 00h FFh P S addr|W 26h 01h 00h P the device is predictably switched to the PMBus mode. The datasheet doesn't tell you that either.

Bonus: how many bits do you think this register has?

If you answered "eight" you are correct! Not only is this register 8-bit, but the device actively NACKs writes of more than one byte.